New 600MHz Test Chip Combines Enhanced Built-In Self-Test Functionality and Gigabit Ethernet Interface
Renesas Electronics Corporation (TSE: 6723), a premier supplier of advanced semiconductor solutions, today announced the development and successful operation verification of an automotive test chip as a technological stepping stone toward the realization of next-generation automotive-control flash Microcontrollers (MCUs) employing a 28 nanometer (nm) low-power process.
The MCU features four 600 megahertz (MHz) CPUs with a lock-step mechanism and a large 16 MB flash memory capacity, as well as:
- Virtualization-assisted functions enabling MCU virtualization: This technology allows multiple software components to run on a single MCU without interfering with each other, thereby satisfying the requirements of ASIL D, the highest automotive safety integrity level specified under the ISO 26262 functional safety standard for road vehicles.
- Enhanced built-in self-test (BIST) functionality for MCU self-diagnostic fault-detection necessary to implement ASIL D, thanks to a newly developed standby-resume BIST (SR-BIST) function that is executed during the standby-resume period.
- Enhanced networking functionality, including Gigabit Ethernet interface for high-speed transfer of sensor information.
New electrical/electronic (E/E) architectures are driving demand for the integration of multiple electronic control units (ECUs) into single ECUs that support multiple functions. Achieving this level of integration requires higher performance, reduced power consumption, and large capacity flash memory. Automotive MCUs are also challenged with the requirements of running software components with varying safety integrity levels simultaneously and without mutual interference. In addition to requiring software independence, automotive control demands real-time responsiveness. To meet these next-generation requirements, Renesas has developed new technologies led by virtualization-assisted functions for automotive-control MCUs, as demonstrated in the new test chip.
Key features of the newly-developed test chip
Hardware-based virtualization-assisted functions
Typically, software-based (hypervisor) virtualization requires greater processing time due to the need to emulate hardware virtually. The increased processing time required by the hypervisor to change between CPU states (context switching), deliver interrupts, etc., poses problems for automotive-control MCUs that must maintain real-time responsiveness. To address this issue, Renesas developed a hardware-based virtualization-assisted functions that dramatically reduces (Note 1) the virtualization overhead, thereby boosting responsiveness. It allows software components with varying safety integrity levels to operate independently, making it possible for the MCU to deliver both virtualization and real-time performance as required by ASIL D.
Standby-resume built-in self-test (BIST) function
BIST functions are a requirement in achieving ASIL D safety integrity levels, to enable the MCU to perform self-diagnostics on the MCU while it is running. One way to avoid disturbing a CPU processing period would be to perform self-diagnostics in the period between when the MCU enters the standby state and when resume occurs. However, there is limitation regarding current fluctuations, so the increase in the current fluctuation rate caused by resume due to self-diagnostics is a concern. Renesas has developed standby-resume BIST (SR-BIST) to minimize the current fluctuation rate. SR-BIST runs before the CPU begins operating each time there is a transition from standby to resume. To ensure rapid startup, the on-chip oscillator supplies a clock for the fault diagnostics. An N/M divider is used to gradually increase the frequency of the clock, reducing the current fluctuation rate (Note 2) when SR-BIST is executing. As a result, it allows functional safety that meets the requirements of ASIL D.
SGMII-compliant Gigabit Ethernet interface with 5V support
The next-generation of autonomous driving cars and connected cars will employ large numbers of sensors and cameras, which will require Ethernet as a high-speed communication interface to handle the enormous amount of data generated by these devices. Nevertheless, automotive MCU interface circuits continue to rely on 5V transistors for reliability reasons tied to voltage surges. Therefore, Renesas has developed a Gigabit Ethernet interface using 5V transistors that supports the Serial Gigabit Media Independent Interface (SGMII) standard and provides excellent electrical noise tolerance. To deal with deterioration of the signal bandwidth due to the use of 5V transistors, dedicated circuits were added for receiver and driver. This results in signal quality that complies with the SGMII standard (Note 3).
Based on the technologies verified in the test chip, Renesas plans to aggressively develop new 28nm flash MCUs and continue its commitment to enabling a new generation of eco-friendly and autonomous driving cars and helping to realize a safer and more secure driving experience.
(Note 1) Interrupt to a currently active virtual machine (VM) is activated directly without having to go through the hypervisor. Low-priority interrupt to a background VM is suspended until the VM is activated. This reduces the interrupt overhead to zero, a 100-percent reduction from the previous level.
(Note 2) In experimental results using the test chip, the current fluctuation rate is reduced to one-sixth the previous level by SR-BIST.
(Note 3) Decreasing the source impedance of the receiver circuit and compensating for attenuation of output from the driver circuit reduced by 50 percent the rise/fall time of waveforms in simulations and boosted reception waveform amplitude by 22 percent. The measured test results also confirmed that transmission eye pattern meets the SGMII standard.
